The following configuration of gate is equivalent to
NAND
XOR
OR
AND
Output of G1=A+B; Output of G2=A.B¯=A +B
Output of G3=A+B.A.B¯=A+B.A¯+B¯ ∵A.B¯=A¯+B¯=A.A¯+A.B¯+B.A¯+B.B¯=0+A.B¯+B.A¯+0=A.B¯+B.A¯
which gives XOR gate. Output of XOR gate is A.B¯+A¯.B Therefore, the correct answer is (B).