Two inputs of a NAND gate are shorted. The gate is equivalent to

$\begin{array}{|ccc|}\hline \text{ Input A }& \text{ Input B }& \begin{array}{c}\text{ Output }\\ \end{array}\\ 0& 0& 1\\ 1& 1& 0\\ \hline\end{array}$

In a two-input NAND gate, if both inputs are shorted (means both inputs are same), it will behave like a NOT gate.