The circuit diagram (see$$ $$figure) shows a 'logic combination' with the states outputs X, Y and Z given for inputs P, Q R and S all at state $$1$$ (i$$.e., $$high). When inputs P and R change to state $$0$$ (i$$.e., $$low) with inputs Q and S still at $$1$$, the condition of output X , Y and Z changes to

Question

The circuit diagram (see$$ $$figure) shows a 'logic combination' with the states outputs X, Y and Z given for inputs P, Q R and S  all at state $$1$$ (i$$.e., $$high). When inputs P and R change to state $$0$$ (i$$.e., $$low) with inputs Q and S still at $$1$$, the condition of output X , Y and Z changes to

Infinity Learn · Accepted Answer

The following arguments shall help us to arrive at the right choice.AND gate shall not respond to zero input.Since R is zero and S $$is1$$ therefore NOR gate gives zero. NOT gives 'l ' correspond to $$0$$.NOR gate would not respond to $$0$$ and $$1$$.

The circuit diagram (see figure) shows a 'logic combination' with the states outputs X, Y and Z given for inputs P, Q R and S all at state 1 (i.e., high). When inputs P and R change to state 0 (i.e., low) with inputs Q and S still at 1, the condition of output X , Y and Z changes to

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