Questions
The configuration of gate shown in figure is equivalent to
a
NAND
b
XOR
c
OR
d
none of these
detailed solution
Correct option is B
Y = (A+B).(A.B¯) = A+B.A¯+B¯ A.A¯+A.B¯+B.A¯+B.B¯ = 0+A.B¯ + B.A¯ + 0⇒ Y = A.B¯ +B.A¯ ⇒ XOR gateTalk to our academic expert!
Similar Questions
In the following circuit, the output Y for all possible inputs A and B is expressed by the truth table
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